Monolayer Graphene on Quartz
Monolayer Graphene on Quartz - Processed in Clean Room Class 1000
Our monolayer graphene on Quartz (fully covered) is produced by CVD and transferred to a circular substrate of Quartz (500 μm thickness) by a wet transfer process. Its high quality and wide range of applications make it a benchmark product in the graphene market.
- · Growth method: CVD synthesis
- · Appearance (color): Transparent
- · Transparency: > 97%
- · Coverage: > 98%
- · Number of graphene layers: 1
- · Thickness (theoretical): 0.345 nm
- · FET Electron Mobility on Al2O3 passivated SiO2/Si: 6900 cm2 /Vs (doi: http://dx.doi.org/10.1063/1.4972847)
- · FET Electron Mobility on SiO2/Si: 3760 cm2/Vs DOI: https://doi.org/10.1103/PhysRevLett.119.066802
- · Sheet Resistance: 360±50 Ohms/sq (1cm x1cm)
- · Grain size: Up to 20 μm
- · Thickness: 500 µm
- · Flatness; Bow: 20 µm, Warp: 30 µm
- · Roughness: 6Å (both side polished )
All our samples are subjected to a rigorous QC in order to ensure a high quality and reproducibility of the graphene.
- · Raman Spectroscopy on each batch: I(G)/I(2D)<0.7; I(D)/I(G)<0.05
- · Optical Microscopy inspection of each individual sample to ensure good transfer quality and purity
If your application requires more specific controls (AFM, SEM...) please do not hesitate to contact us.
Solar cells, Touch-screens and displays, Photodetectors, Light harvesting devices
Frequently Asked Questions
A: It has to be done under dry conditions. When using wafers such as Si or quartz a diamond pen can be used to cleave it. In order to protect the graphene film from debris, we recommend doing it with the protective PMMA layer on top of graphene. In this case, we can provide you the sample with the PMMA on top.
When using thin substrates such as PEN or PEN you can easily cut them using scissors.
A: In principle, additional cleaning is not needed and you can use our graphene directly. However, thermal annealing can be applied, typically at 250-400C under inert atmosphere in order to have a cleaner graphene and to reduce absorbents on the graphene surface.
A: Our graphene on SiO2 is p-doped, with a charge carrier density of around 1013 cm-2. This intrinsic doping can be reduced by at least one order of magnitude by thermal treatments, which lower the Dirac voltage down to 40-80 V. Another alternative is using a passivation layer on top of the graphene, which prevents the presence of water between the substrate and the graphene film.
Questions and answers about this Product
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